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CXMT Puts Its Fifth-Generation DRAM Platform Into Mass Production, Claims at Least 50% More Gross Dies per Wafer

CXMT says its G5 DRAM platform and 24Gb LPDDR5X products are in mass production. The 50% wafer figure is a company-reported gross-die measure, not verified yield or shipped supply.

John Wood

CXMT said on September 20 that its fifth-generation DRAM process platform, G5, has entered mass production and that it has introduced two 24Gb LPDDR5X products built on the platform [1]. This is a company action, not third-party verification of yields or shipment volume. Still, it moves the Chinese DRAM maker's story from product display to a new production platform.

CXMT says G5 has an 11.95nm active-area half pitch for its memory array and a 45:1 capacitor aspect ratio. Normalized to an 8Gb density baseline, it says gross dies per wafer are at least 50% higher than on the preceding platform [1]. The company also says the two 24Gb LPDDR5X products are now in mass production for smartphones and portable consumer electronics. If those specifications translate consistently into good die, a wafer can yield more saleable capacity and create another supply option for mobile memory.

But 50% more dies per wafer is not the same as 50% more effective supply. CXMT states that the measure is gross die count and is normalized at 8Gb [1]. Seoul Economic Daily likewise notes that dies before defect screening differ from actual yield, and that an 11.95nm measurement on one structure cannot be directly mapped to process labels used by other suppliers [2]. TechNode independently confirmed the announcement and listed specifications, but reported no customer qualification, yield, or volume data [3].

John Wood's analysis is that G5 most immediately gives CXMT a process basis to broaden LPDDR5X products; it does not yet rewrite global DRAM supply and demand. Its effect on commodity-DRAM competition depends on yield ramp, design wins for the 24Gb products, customer qualification and actual wafer starts. Watch for disclosed good-die yield, certifications or shipment cadence, and for independent tests of power, reliability and performance. Until then, the 50% figure should be read only as a company-reported gross-die improvement.

Key facts, company claims, and analysis in this article map to the cited evidence below.

Source claimSupports
CXMT

CXMT Announces Mass Production of 5th-Generation DRAM Technology Platform

Source published

CXMT company statement; the mass-production and product-status claims are self-reported and not independently verified for yield or shipment volume.

Open source
Source claimSupports
CXMT

CXMT Announces Mass Production of 5th-Generation DRAM Technology Platform

Source published

CXMT company claim; the 50% figure is gross dies per wafer before yield losses, normalized by the company at an 8Gb density baseline.

Open source
AnalysisInvalidation
MemoryTicker

MemoryTicker analysis of CXMT G5 disclosure

MemoryTicker analysis; it makes no supply, pricing, revenue or shipment forecast.

Open source
FactCounter-evidence
Seoul Economic Daily

China's CXMT Starts Mass Production of Fifth-Generation DRAM

Source published

Seoul Economic Daily reporting and technical caution about the company's stated metrics.

Open source
FactContext
TechNode

CXMT announces mass production of fifth-generation DRAM platform

Source published

TechNode independent reporting corroborates the announcement and clearly does not verify yield, customers or production volume.

Open source
CXMT Puts Its Fifth-Generation DRAM Platform Into Mass Production, Claims at Least 50% More Gross Dies per Wafer|MemoryTicker